1. Field of the Invention
The invention relates in general to a semiconductor element and an operating method thereof, and more particularly to a high voltage semiconductor element and an operating method thereof.
2. Description of the Related Art
With the development of semiconductor technology, a bipolar COMS DMOS (BCD) manufacturing technology has been widely used for a high voltage semiconductor element. An operating voltage of a semiconductor element for the BCD manufacturing technology has been higher and higher, such that an on-chip electro-static discharge (ESD) protection design becomes a challenging task.
A high voltage semiconductor element usually has low on-state resistance (Rdson), so an electro-static current is likely to concentrate in a surface or an edge of a drain during an electro-static event. High voltage current and high electric field will cause a physical destruction at a surface junction region.
Based on a requirement for lowering the on-state resistance (Rdson), the surface or a lateral side of the high voltage semiconductor element cannot be increased. Therefore, it is a challenge to get a better ESD protection structure.
Further, a breakdown voltage of the high voltage semiconductor element is always greater than the operation voltage thereof. A trigger voltage of the high voltage semiconductor element is often higher than the breakdown voltage thereof quite a lot. Therefore, a protected device or an internal circuit usually has risks of damages, before the high voltage semiconductor element turns on an ESD protection during the electro-static event. To reduce the trigger voltage, it is needed an additional external ESD detection circuit.
Moreover, the high voltage semiconductor element usually has a low holding voltage. There is a possibility that the high voltage semiconductor element is triggered by an unwanted noise, a power-on peak voltage or a serge voltage and a latch-up may occur during a normal operation.
Further, the high voltage semiconductor element usually has a field plate effect. The distribution of the electric field is sensitive, so the electro-static current is easy to concentrate at the surface or the edge of the drain during the electro-static event.
There are some methods for the ESD protection; however, those methods will increase some additional masks or manufacturing steps. Another method for the ESD protection is to add an additional device used for ESD protection only. The additional ESD device is a big size diode, a bipolar transistor (BJT), a metal oxide semiconductor transistor (MOS) being increased the surface or the lateral side, or a silicon controlled rectifier (SCR). Wherein, the silicon controlled rectifier (SCR) has a low holding voltage, so the latch-up may easily occur during the normal operation.
According to the actual state, the electro-static event has been a bottleneck of the development of the high voltage semiconductor element. It is needed to make a breakthrough on this technology.